x86/AMD: apply erratum 665 workaround
authorEmanuel Czirai <icanrealizeum@gmail.com>
Mon, 26 Sep 2016 15:28:09 +0000 (17:28 +0200)
committerJan Beulich <jbeulich@suse.com>
Mon, 26 Sep 2016 15:28:09 +0000 (17:28 +0200)
commit6bfee2038565a208f4ecef0911087ca10eecf25b
treeb41ea3d8fd5a18649c63f02f328061bb8647a41e
parentbdb860d01cac7bcbaebbdce29ae9e9c7e9582d03
x86/AMD: apply erratum 665 workaround

AMD F12h machines have an erratum which can cause DIV/IDIV to behave
unpredictably. The workaround is to set MSRC001_1029[31] but sometimes
there is no BIOS update containing that workaround so let's do it
ourselves unconditionally. It is simple enough.

[ Borislav: Wrote commit message. ]

Signed-off-by: Emanuel Czirai <icanrealizeum@gmail.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
[Linux commit: d1992996753132e2dafe955cccb2fb0714d3cfc4]

Make applicable to Xen.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
xen/arch/x86/cpu/amd.c
xen/include/asm-x86/msr-index.h